DDR SDRAM

NCP DDR SDRAM


Double-Data-Rate (DDR) is making strong inroads into the computing, telecom and consumer markets. The new DRAM architecture is a very powerful, high performace continuation of the Synchronous DRAMs PC66, PC100 and PC133.

DDR SDRAMs are transfering data on both edges of the clock, so that a DDR SDRAM clocked at 100 MHz will offer a burst rate of 200 Mbit/s or a peak bandwidth of more than 1.Gbytes/s in an 8-byte application. Likwise, clocking at 133MHz will result in a peak bandwidth of 2.1 Gbytes/s. Available in PC266 and PC333.

Features
  • 184-pin Dual in-line memory modules (DIMM)
  • VDD=+2.5V 0.2V, VDDQ= +2.5V+-0.2V
  • 2.5V I/O (SSTL-2 compatible)
  • Commands entered on each positive CK edge
  • DQS edge-aligned with data for READs; center-aligned with data for WRTIEs
  • Internal, piplined double data rate (DDR) architechture; 2 data accesses per clock cycle
  • Auto Refresh (CBR) and Self Refresh
  • Bidirectional data strobe (DQS) transmitted/received with data i.e., source-synchronous data capture
  • Differential clock inputs (CKO and CKO#)
  • 4 internal banks for concurrent operation
  • Available in 128/256/512 MB module package
  • Programmable burst lengths:2,4 or 8
  • Auto Precharge option
  • 15 ms maximum average periodic refresh interval
  • TSOP66 Package

Product Datasheet  Download DDR Compatibility List (14 kB)